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july 2007 rev 4 1/18 1 sths4257a, sths4257a1 STHS4257L, STHS4257L1 ieee 802.3af poe powered device (pd) interface controller with in tegrated signature resistor features ieee 802.3af-compliant interface for powered devices (pds) integrated 100v, 450ma power mosfet low side switch inrush current limit normal operation current limit integrated 25k signature resistor signature disable (sths4257a1/l1) resistor-programmable classification current (class 0-4) power good output, open drain undervoltage lockout (uvlo) thermal overload protection (two-step for the sths4257a/l) latch (l) or auto-retry (a) after repetitive thermal overload industrial temperature range: ?40 to +85c so8 and dfn8 (3mm x 3mm) packages rohs compliant applications voice over ip (voip) phones web cameras wlan access points internet appliances pos terminals rfid readers dfn8 3mm x 3mm (db) so8 (m) 8 1 table 1. device options order code signature disable uvlo threshold, rising (v) uvlo threshold, falling (v) protection mode thermal overload protection inrush current limit (ma, typ) normal operation current limit (ma, typ) sths4257a 39.2 30.5 auto 2 steps 350/188 (1) sths4257a1 ? 36.0 30.5 auto 1 step 140 375 STHS4257L 39.2 30.5 latch 2 steps 350/188 (1) STHS4257L1 ? 36.0 30.5 latch 1 step 140 375 1. current limit is common for both modes and gets reduced only in case of thermal overload. see table 5: electrical parameters . www.st.com
contents sths4257a, sths4257a1, STHS4257L, STHS4257L1 2/18 contents 1 summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 1.1 pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.1.1 classification (r class ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.1.2 v in . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.1.3 power supply (gnd) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.1.4 signature disable input (sigdisa) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.1.5 power good output (pwrgd ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.1.6 negative power output (v out ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 1.2 ieee802.3af pd power classes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2 absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 3 electrical parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5 part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 6 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
sths4257a, sths4257a1, STHS4257L, STHS4257L1 list of tables 3/18 list of tables table 1. device options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 table 2. signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 3. ieee802.3af pd power classes and corresponding r class values. . . . . . . . . . . . . . . . . . . 7 table 4. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 table 5. electrical parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 6. so8 ? 8-lead plastic small outline, 150mils width, mechanical data. . . . . . . . . . . . . . . . . . 14 table 7. dfn8 ? 8-lead dual flat no-lead outline, package mechanical data . . . . . . . . . . . . . . . . . . 15 table 8. ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 table 9. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
list of figures sths4257a, sths4257a1, STHS4257L, STHS4257L1 4/18 list of figures figure 1. logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 2. pin connections (sths4257a/l, top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. pin connections (sths4257a1/l1, top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 4. application circuit overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 figure 5. block diagram (sths4257a/l). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 figure 6. typical application circuit (sths4257a/l) with a dc/dc converter. . . . . . . . . . . . . . . . . . . 9 figure 7. block diagram (sths4257a1/l1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 0 figure 8. typical application circuit (sths4257a1/l1) with a dc/dc converter. . . . . . . . . . . . . . . . 10 figure 9. so8 ? 8-lead plastic small outline, 150mils width, mechanical drawing . . . . . . . . . . . . . . . 14 figure 10. dfn8 ? 8-lead dual flat no-lead outline, pa ckage mechanical drawing . . . . . . . . . . . . . . . 15
sths4257a, sths4257a1, STHS4257L, STHS4257L1 summary description 5/18 1 summary description the sths4257 is an ieee802.3af-compliant fam ily of interface contro llers for power over ethernet (poe) powered device (pd) applications. the devices consist of two main sections: the ieee802.3af in terface to the poe powered rj-45 wall socket, and the hot swap controller (hsc) functions required to protect the pd during insertion, operation, and withdrawal from the rj-45 socket. these devices have an integrated high voltage power mosfet (low-side switch) with low r on and the capability to accept transients as high as 100v. since the pins (such as gnd and v in ) which interface to the rj-45 socket can routinely see high peak voltages in excess of 100v, it is strongly recommended that board designers protect the pd device with a transient voltage suppressor, such as the smaj58a (available from stmicroelectronics), connected between the gnd and v in pins (see figure 4 on page 8 ). the ieee802.3af-compliant interface includes the basic pd detection and classification functions, whereas the ?hot swap? functions include other basic features, such as inrush current limiting, undervoltage lockout (uvlo), and thermal overload protection. all of the devices include an open drain power good (pwrgd ) signal to indicate normal steady operation (see figure 1 on page 6 and table 2 on page 6 ). the sths4257 family also incorporates a 1.5v voltage offset (two series diodes) to accommodate the input diode bridge used to make the pd polarity insensitive. the sths4257a1/l1 includes a dual level current limit circuit. this allows the sths4257a1/l1 to interface with legacy power over ethernet (lan) systems while maintaining compatibility with the current ieee 802.3af specification. each of the two basic part types, the sths4257a/l and the sths4257a1/l1, is available either with latched operation (l) mode or with automatic retry (a) mode after fault conditions. for product options overview see table 1 on page 1 .
summary description sths4257a, sths4257a1, STHS4257L, STHS4257L1 6/18 figure 1. logic diagram 1. sths4257a1 and STHS4257L1 devices only. figure 2. pin connections (sths4257a/l, top view) figure 3. pin connections (sths4257a1/l1, top view) ai12214a gnd sths4257a/l sths4257a1/l1 v in v out sigdisa (1) r class pwrgd table 2. signal names pin symbol description sths4257a/l sths4257a1/l1 1, 3, 7 1, 3 nc no connect 22r class classification pin 44v in negative return power line to pse 55v out power output (negative rail) 66p wr g d power good output, open drain, active-low (referenced to v in ) ? 7 sigdisa signature disable input, internally pulled to v in 8 8 gnd positive power supply; common input/output power rail nc r class nc v in gnd nc v out ai12204b pwrgd 1 2 3 4 8 7 6 5 nc r class nc v in gnd sigdisa v out ai12205b pwrgd 1 2 3 4 8 7 6 5
sths4257a, sths4257a1, STHS4257L, STHS4257L1 summary description 7/18 1.1 pin descriptions 1.1.1 classification (r class ) this is the classification pin. connect a classification resistor between this pin and v in to tell the pse which power class will be conn ected. leave it open for class 0. note: do not connect this pin directly to v in . for power classes and r class resistor values, see ta b l e 3 . 1.1.2 v in this is negative return power line to pse. 1.1.3 power supply (gnd) this is the power input/output, positive rail. 1.1.4 signature disab le input (sigdisa) this pin is internally pulled down to v in to present a valid signatu re to pse. connect to v in if it is unused. tie to gnd to present an invalid signature. note: this signal is available for sths4257a1 and STHS4257L1 only. 1.1.5 power good output (pwrgd ) this pin indicates that the sths4257x/x1 power mosfet is fully on and works in normal operation mode (power good). open drain, low impedance means that the power is good; in all other cases, the impedance is high (referenced to v in ). 1.1.6 negative power output (v out ) this is the power output, negative rail. 1.2 ieee802.3af pd power classes table 3. ieee802.3af pd power classes and corresponding r class values 1. class 4 is currently re served and should not be used. class usage max. power levels at input of pd (w) nominal classification load current (ma) r class resistor ( , 1%) 0 default 0.44 to 12.95 < 5 open 1 optional 0.44 to 3.84 10.5 124 2 optional 3.84 to 6.49 18.5 68.1 3 optional 6.49 to 12.95 28 45.3 4 reserved reserved (1) 40 30.9
summary description sths4257a, sths4257a1, STHS4257L, STHS4257L1 8/18 figure 4. application circuit overview 1. sths4257a1 and STHS4257L1 devices only. to di sable signature, tie this pin to gnd. 2. this configuration uses either data wires or s pare wires for dc power. data to ethernet physical layer device 100 k 100f, 100v + 0.1f, 100v to dc/dc converter data to ethernet physical layer device r class smaj58a r class sths4257a/l sths4257a1/l1 v in gnd v out ai12203b 2x df01s rx pair spare pair spare pair rj-45 tx pair pwrgd sigdisa (1) c1 c2
sths4257a, sths4257a1, STHS4257L, STHS4257L1 summary description 9/18 figure 5. block diagram (sths4257a/l) figure 6. typical application circuit (sths4257a/l) with a dc/dc converter r s ref 25k signature resistor power good input current limit classification current source control circuits + ? + ? en en v in gnd ai12206c pwrgd 1 2 3 4 8 7 6 5 ref nc nc r class nc v out power mosfet 100 k 5f (min) 100v 0.1f 100v smaj58a r class v in 48v from power sourcing equipment (pse) ai12207a r class shdn ~ ~ + + + 3v to logic ? sths4257a/l powered device (pd) switching power supply diode bridge v in df01s gnd v out rtn pwrgd c1 c2 ?
summary description sths4257a, sths4257a1, STHS4257L, STHS4257L1 10/18 figure 7. block diagram (sths4257a1/l1) 1. ref.1 = i limit high 2. ref. 2 = i limit low figure 8. typical application circuit (sths4257a1/l1) with a dc/dc converter r s ref1 (1) ref2 (2) 25k signature resistor 9k 16k power good input current limit classification current load control circuits + ? + ? en en v in v out gnd ai12208a pwrgd 1 2 3 4 8 7 6 5 ref nc nc r class sigdisa signature disable power mosfet 100 k 5f (min) 100v 0.1f 100v smaj58a r class v in 48v from power sourcing equipment (pse) ai12209a r class shdn ~ ~ + + + 3v to logic ? sths4257a1/l1 powered device (pd) switching power supply diode bridge v in df01s gnd v out sigdisa rtn pwrgd c1 ? c2
sths4257a, sths4257a1, STHS4257L, STHS4257L1 absolute maximum ratings 11/18 2 absolute maximum ratings stressing the device above the rating listed in the table 4: absolute maximum ratings may cause permanent damage to the device. these are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not imp lied. exposure to absolute ma ximum rating conditions for extended periods may affect device reliability. refer also to the stmicroelectronics sure program and other relevant quality documents. table 4. absolute maximum ratings symbol parameter value unit v in input/supply voltage (1) 1. with respect to the gnd pin. +0.3 to ?100 v v out voltage on v out pin v in +100 to v in ?0.3 v v sigdisa , v pwrgd voltage on the respective pins v in +90 to v in ?0.3 v v rclass voltage on r class pin v in +7 to v in ?0.3 v i pwrgd power good output current 10 ma i rclass r class pin current 100 ma t a operating ambient temperature range ?40 to 85 c t stg storage temperature ?55 to 150 c t sld lead solder temperature for 10 seconds, lead-free lead finish (2) 2. reflow at peak temperature of 260 c (total thermal budget not to exceed 245c for more than 30 seconds). 260 c
electrical parameters sths4257a, sths4257a1, STHS4257L, STHS4257L1 12/18 3 electrical parameters over the full operating temperature range, unless otherwise noted. specifications common for both sths4257x (=sths4257a, STHS4257L) and sths4257x1 (=sths4257a1, STHS4257L1) product familie s unless otherwise noted. table 5. electrical parameters symbol parameter cond itions min typ max unit v in maximum operating voltage input/supply voltage - with respect to gnd pin (1) , (2) , (3) ?57 v signature range ?1.5 ?9.5 v classification range ?12.5 ?21 v uvlo turn-on voltage, sths4257x1 ?34.8 ?36.0 ?37.2 v uvlo turn-on voltage, sths4257x ?37.7 ?39.2 ?40.2 v uvlo turn-off voltage ?29.3 ?30.5 ?31.5 v i in on supply current when on v in = ?48v, pins 5, 6, 7 floating 0.33 0.5 ma i in class supply current during classification v in = ?17.5v, pins 2, 7 floating, v out tied to gnd (4) 0.12 0.25 0.38 ma i class current accuracy during classification 10ma < i class < 40ma, ?12.5v v in ?21v (5) 3.5 % r signature signature resistance ?1.5v v in ?9.5v, v out tied to gnd, ieee 802.3af 2-point measurement (2) , (6) 23.25 26.00 k r invalid invalid signature resistance ?1.5v v in ?9.5v, sigdisa and v out tied to gnd, ieee 802.3af 2-point measurement (2) , (6) , (7) 911.8k v ih signature disable high level input voltage with respect to v in , high level invalidates signature (7) 357v v il signature disable low level input voltage with respect to v in , low level enables signature (7) 0.45 v r input signature disable input resistance with respect to v in 100 k v pg out power good output low voltage i pg = 1ma, v in = ?48v, pwrgd referenced to v in 0.5 v v pg th rise (8) power good trip point, power good signal going inactive v in = ?48v, voltage between v in and v out , v out rising 2.7 3.0 3.3 v i pg leak power good leakage current v pwrgd - v in = 57v, pwrgd mosfet off, v pwrgd = v gnd (9) 1a r on on-resistance i = 350ma, v in = ?48v, measured from v in to v out 0.72 1.0 i out leak v out pin leakage current v in = 0v, power mosfet off, v out = 57v (10) 1a i limit high input current limit, high level, sths4257x1 (normal operation mode) v in = ?48v, v out = ?43v (11) , (12) 0c t a 70c ?40c t a 85c 340 375 400 ma 330 375 400 ma
sths4257a, sths4257a1, STHS4257L, STHS4257L1 electrical parameters 13/18 i limit low input current limit, low level, sths4257x1 (inrush mode) v in = ?48v, v out = ?43v (11) , (12) 100 140 180 ma i limit input current limit, sths4257x v in = ?48v, v out = ?43v (14) 300 350 400 ma i limit warm overtemperature input current limit, sths4257x (14) 188 ma t overtemp overtemperature trip temperature, sths4257x (14) 120 c t shutdown thermal shutdown trip temperature (11) , (13) , (14) 140 c 1. the sths4257 family of poe products operates with a negat ive supply voltage (with respec t to the gnd pin, unless otherwise noted). voltages in this data sheet are always referred to in terms of absolute magnitude, thus "maximum negative voltage" means the most negative voltage and analogicall y "rising negative voltage" refers to a voltage that is becoming more negative. 2. the sths4257 family of products is designed to work with two series diode drops caused by diode bridge that makes the pd input polarity-insensitive. paramete r ranges specified in the electrical pa rameters table are with respect to sths4257x/x1 pins and are designed to meet the ieee 802.3a f specifications when these diode drops are included. see figure 4 on page 8 . 3. the sths4257x/x1 devices include hysteresis in the uvlo volt ages to avoid any start-up oscillation. as required by ieee 802.3af, the sths4257 family devices will power up from a voltage source with 20 series resistance on the first trial. 4. the supply current du ring classification (i in class ) does not include classification cu rrent programmed at pin 2. total supply current in classi fication mode will be i in class + i class (see also note 5 ). 5. i class is the measured current flowing through r class . i class accuracy is with respect to the ideal current defined as i class = 1.237/r class . the current accuracy specificatio n does not include variations in r class resistance. the total classification current seen by pse also includes the quiescent current (i in class ). see figure 4 on page 8 . 6. signature resistance is m easured via the 2-point v/ i method as defined by ieee 802.3af standard. the sths4257 device family signature resistanc e is offset from standard 25k to account for the series diode bridge resistance. with two series diodes, the total pd resistance will be between 23.75k and 26.25k which meets ieee 802.3af specifications. the minimum probe voltages measured at the sths4257x/x1 pins are ?1.5 and ?2.5v. the maximum probe voltages are ?8.5 and ?9.5v. 7. to disable the 25k signature, tie sigdisa to gnd (0.1v) or hold sigdisa high with respect to v in . see figure 4 on page 8 . 8. v pg th fall is not used: to eliminate the current peak during t he transition from inrush to normal operation mode, the power mosfet (between v out and v in - see figure 5 on page 9 ) turns fully on only after the inrush current decreases by 10% from its initial value (i.e. when the output capacitor is fully charged). 9. gnd pin at the same potential as pwrgd pin to prevent esd protection from impacting the measured results. to keep pwrgd mosfet off under this condition, maintain uninterr upted inrush current e.g. by applying 1v voltage between v out and v in pin. this will keep the device in inrush mode, thus preventing pwrgd from going active (on). 10. to significantly reduce i out leak and eliminate its impact on total current duri ng detection and classification, the resistor divider used to provide feedback on v out - v in voltage is disconnected below the uvlo threshold. 11. the sths4257x1 includes thermal protection. in the event of an overtemperature condition (t shutdown is reached), the sths4257x1 will turn off the power mosfet until t he part cools below the overtemperature limit (t overtemp ). the sths4257x1 is also protected against thermal damage from incorrect classification probing by the pse: if the sths4257x1 temperature exceeds the shutdown trip point (t shutdown ), the classification l oad current is disabled. 12. the sths4257x1 includes dual level input current limit. at turn-on, before output capacitor c2 is charged, the sths4257x1 current level is set to the low level. after t he output capacitor c2 is charged, the sths4257x1 switches to high level current limit and remains there until the i nput voltage drops below the uvlo turn-off threshold. 13. the sths4257 family devices include overtemperature protec tion that is intended to protect the device during momentary overload conditions only. c ontinuous operation close to overtemperatur e limits may impair device reliability. 14. the sths4257x includes smart thermal protection. in the event of an overtemperature condition, the sths4257x will reduce the input current limit by 50% to reduce the power dissipation in the package. if the part continues heating and reaches the shutdown temperature (t shutdown ), the current is reduced to zero until the part cools below the overtemperature limit (t overtemp ). the sths4257x is also protected against thermal damage from inco rrect classification probing by the pse: if the sths4257x temp erature exceeds the shutdown trip point (t shutdown ), the classification load current is disabled. table 5. electrical parameters (continued) symbol parameter cond itions min typ max unit
package mechanical data sths4257a, sths4257a1, STHS4257L, STHS4257L1 14/18 4 package mechanical data in order to meet environmental requirements, st offers these devices in ecopack ? packages. these packages have a lead-free second level interconnect. the category of second level interconnect is marked on the package and on the inner box label, in compliance with jedec standard jesd97. the maximum ratings related to soldering conditions are also marked on the inner box label. ecopack is an st trademark. ecopack specifications are available at: www.st.com. figure 9. so8 ? 8-lead plastic small outline, 150mils width, mechanical drawing 1. drawing is not to scale. table 6. so8 ? 8-lead plastic small outline, 150mils width, mechanical data symb mm inches typ min max typ min max a ? 1.35 1.75 ? 0.053 0.069 a1 ?0.100.25?0.0040.010 b ? 0.33 0.51 ? 0.013 0.020 c ? 0.19 0.25 ? 0.007 0.010 d ? 4.80 5.00 ? 0.189 0.197 ddd ? ?0.10? ?0.004 e ? 3.80 4.00 ? 0.150 0.157 e 1.27 ? ? 0.050 ? ? h ? 5.80 6.20 ? 0.228 0.244 h ? 0.25 0.50 ? 0.010 0.020 l ? 0.40 0.90 ? 0.016 0.035 ? 0 8 ? 0 8 n8 8 so-a e 8 ddd b e a d c l a1 1 h h x 45? a2
sths4257a, sths4257a1, STHS4257L, STHS4257L1 package mechanical data 15/18 figure 10. dfn8 ? 8-lead dual flat no-lead outline, package mechanical drawing 1. drawing is not to scale. table 7. dfn8 ? 8-lead dual flat no-lead outline, package mechanical data symb mm inches typ min max typ min max a 0.90 0.80 1.00 0.035 0.031 0.039 a1 0.02 ? 0.05 0.001 0.002 a2 0.70 ? ? 0.028 a3 0.20 ? ? 0.008 b 0.23 0.18 0.30 0.009 0.007 0.012 d 3.00 ? ? 0.118 d2 2.38 2.23 2.48 0.094 ddd ? ? 0.08 0.003 e 3.00 ? ? 0.118 e2 1.64 1.49 1.74 0.065 0.059 0.069 e 0.50 ? ? 0.020 ? ? l 0.40 0.30 0.50 0.016 0.012 0.020 n8 8 dfn-a bottom view seating plane c ddd c a a1 a2 a3 d e l d2 b e 12 34 87 65 e2
part numbering sths4257a, sths4257a1, STHS4257L, STHS4257L1 16/18 5 part numbering table 8. ordering information scheme for other options, or for more information on any aspect of this device, please contact the st sales office nearest you. example: sths 4257a1 m 6 f device type sths product options 4257a 4257a1 4257l 4257l1 package m = so8 (150mils width) db (1) = dfn8 (3mm x 3mm) 1. contact local sales office for availability. temperature range 6 = ?40 to 85c shipping method f = ecopack package, tape & reel e = ecopack package, tube
sths4257a, sths4257a1, STHS4257L, STHS4257L1 revision history 17/18 6 revision history table 9. document revision history date revision changes 12-jul-2006 1 initial release. 19-dec-2006 2 updated features and ta b l e 4 . 24-may-2007 3 formatting changes and updated ta b l e 5 . 26-jul-2007 4 document status upgraded to full datasheet, updated cover page and ta b l e 8 .
sths4257a, sths4257a1, STHS4257L, STHS4257L1 18/18 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a parti cular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. unless expressly approved in writing by an authorized st representative, st products are not recommended, authorized or warranted for use in milita ry, air craft, space, life saving, or life sustaining applications, nor in products or systems where failure or malfunction may result in personal injury, death, or severe property or environmental damage. st products which are not specified as "automotive grade" may only be used in automotive applications at user?s own risk. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2007 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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